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exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 1 sp3222eb/sp3232eb tru e +3.0v to +5.5v rs-232 transceivers the sp3222eb/sp3232eb series is an rs232 transceiver solution intended for portable or handheld applications such as notebook or laptop computers. the sp3222eb/sp3232eb series has a highef? ci ency, chargepump power supply that requires only 0.1f capacitors in 3.3v operation. this charge pump allows the sp3222eb/sp3232eb series to deliver true rs232 performance from a single power supply ranging from +3.0v to +5.5v . the sp3222eb/ sp3232eb are 2driver/2receiver devices. the esd tolerance of the sp3222eb/sp3232eb devices is over +/15kv for both human body model and iec6100042 air discharge test methods. the sp3222eb device has a lowpower shutdown mode where the devices' driver outputs and charge pumps are disabled. during shutdown, the supply current falls to less than 1a. features meets true eia/tia232f standards from a +3.0v to +5.5v power supply 250kbps tra nsmission rate under load 1a low power shutdown with receivers active ( sp3222eb ) interoperable with rs232 down to a +2.7v power source enhanced esd speci? cations: +15kv human body model +15kv iec6100042 air discharge +8kv iec6100042 contact discharge description selection table now a vailable in lead free packaging v- 1 2 3 4 13 14 15 16 5 6 7 12 11 10 c1+ v+ c1- c2+ c2- r1in r2in gnd v cc t1out t2in 8 9 sp3232eb t1in r1out r2out t2out device power supplies rs232 drivers rs232 receivers external components shutdown ttl 3state # of pins sp3222eb +3.0v to +5.5v 2 2 4 capacitors yes yes 18, 20 sp3232eb +3.0v to +5.5v 2 2 4 capacitors no no 16
2 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 note 1 : v+ and v can have maximum magnitudes of 7v, but their absolute difference cannot exceed 13v. these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the speci? ca tions below is not implied. exposure to absolute maximum rating conditions for extended periods of time may aff ect reliability and cause permanent damage to the device.v cc .......................................................0.3v to +6.0v v+ (note 1).......................................0.3v to +7.0v v (note 1)........................................+0.3v to 7.0v v+ + |v| (note 1)...........................................+13v i cc (dc v cc or gnd current).........................+100ma input voltages txin, en..............................................0.3v to +6.0v rxin...................................................................+15v output voltages txout.............................................................+13.2v rxout, .......................................0.3v to (v cc +0.3v) short-circuit duration txout....................................................continuous storage t emperature......................65c to +150c unless otherwise noted, the following speci? cations apply for v cc = +3.0v to +5.5v with t amb = t min to t max , c1 c4 = 0.1 f. power dissipation per package 20pin ssop (derate 9.25mw/ o c above +70 o c)..............750mw 18pin soic (derate 15.7mw/ o c above +70 o c)..............1260mw 20pin tssop (derate 11.1mw/ o c above +70 o c).............890mw 16pin ssop (derate 9.69mw/ o c above +70 o c)...............775mw 16pin wide soic (derate 11.2mw/ o c above +70 o c)........900mw 16pin tssop (derate 10.5mw/ o c above +70 o c)..............850mw 16pin nsoic (derate 13.57mw/ o c above +70 o c)...........1086mw maximum junction te m perature .......................................+125c thermal resistance ja ..............................................100.4c/w thermal resistance jc ................................................19.0c/w electrical characteristics par ameter min. typ. max. units conditions dc characteristics supply current 0.3 1.0 ma no load, v cc = 3.3v, t amb = 25 o c, txin = gnd or v cc shutdown supply current 1.0 10 a shdn = gnd, vcc = 3.3v, t amb = 25 o c, txin = vcc or gnd logic inputs and receiver outputs input logic threshold low gnd 0.8 v txin, en, shdn, note 2 input logic threshold high 2.0 vcc v vcc = 3.3v, note 2 input logic threshold high 2.4 vcc v vcc = 5.0v, note 2 input leakage current +0.01 +1.0 a txin, en, shdn, t amb = +25 o c, v in = 0v to v cc output leakage current +0.05 +10 a receivers disabled, v out = 0v to v cc output voltage low 0.4 v i out = 1.6ma output voltage high v cc 0.6 v cc 0.1 v i out = 1.0ma driver outputs output voltage swing +5.0 +5.4 v all driver outputs loaded with 3k to gnd, t amb = +25 o c note 2 : driver input hysteresis is typically 250mv. absolute maximum ratings
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 3 unless otherwise noted, the following speci? cations apply for v cc = +3.0v to +5.5v with t amb = t min to t max , c1 c4 = 0.1 f. ty pical values apply at v cc = +3.3v or +5.0v and t amb = 25c. electrical characteristics par ameter min. typ. max. units conditions driver outputs (continued) output resistance 300 v cc = v+ = v = 0v, v out =+2v output shortcircuit current +35 +60 ma v out = 0v output leakage current +25 a v cc = 0v or 3.0v to 5.5v, v out = +12v, drivers disabled receiver inputs input voltage range 15 15 v input threshold low 0.6 1.2 v vcc = 3.3v input threshold low 0.8 1.5 v vcc = 5.0v input threshold high 1.5 2.4 v vcc = 3.3v input threshold high 1.8 2.4 v vcc = 5.0v input hysteresis 0.3 v input resistance 3 5 7 k timing characteristics maximum data rate 250 kbps r l = 3k, c l = 1000pf, one driver active receiver propagation delay, t phl 0.15 s receiver input to receiver output, c l = 150pf receiver propagation delay, t plh 0.15 s receiver input to receiver output, c l = 150pf receiver output enable tim e 200 ns receiver output disable tim e 200 ns driver skew 100 ns | t phl t plh |, t amb = 25c receiver skew 50 ns | t phl t plh | tra nsitionregion slew rate 30 v/s vcc = 3.3v, r l = 3k, c l = 1000pf, t amb = 25c, measurements taken from 3.0v to +3.0v or +3.0v to 3.0v
4 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 unless otherwise noted, the following performance characteristics apply for v cc = +3.3v, 1000kbps data rate, all drivers loaded with 3k, 0.1f charge pump capacitors, and t amb = +25c. figure 2. slew rate vs load capacitance figure 1. tra nsmitter output voltage vs load capacitance 64 2 0 -2-4 -6 0 1000 2000 3000 4000 5000 txout + txout - transmitter output voltage (v) load capacitance (pf) t1 at 250 kbps t2 at 15. 6kbps a ll tx load ed 3k // cload figure 3. supply current vs. load capacitance when t ransmitting data figure 5. tra nsmitter output voltage vs supply vol tage figure 4. supply current vs. supply voltage typical performance characteristics 3025 20 15 10 50 0 500 1000 2000 3000 4000 5000 slew rate (v/s) load capacitance (pf) - slew + slew t1 at 250 kbps t2 at 15. 6kbps a ll tx load ed 3k // cload 64 2 0 -2-4 -6 2.7 3 3.5 4 4.5 5 supply voltage (v) transmitter output voltage (v) txout - txout + t1 at 250 kbps t2 at 15. 6kbps a ll tx load ed 3k // 1000 pf 3530 25 20 15 10 50 supply current (ma) load capacitance (pf) 0 1000 2000 3000 4000 5000 250kbps 125kbps 20kbps t1 at ful l data rat e t2 at 1/1 6 data rat e a ll tx load ed 3k // cload 1614 12 10 86 4 2 0 2.7 3 3.5 4 4.5 5 supply current (ma) supply voltage (v) 1 t ransmit ter at 250 kbps 1 t ransmit ter at 15. 6kbps a ll tran smitters loa ded with 3k // 1000p f
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 5 ta b le 1. device pin description name function pin number sp3222eb sp3232eb soic ssop tssop en receiver enable. apply logic low for normal operation. apply logic high to disable the receiver outputs (highz state) 1 1 c1+ positive terminal of the voltage doubler chargepump capacitor 2 2 1 v+ +5.5v output generated by the charge pump 3 3 2 c1 negative terminal of the voltage doubler chargepump capacitor 4 4 3 c2+ positive terminal of the inverting chargepump capacitor 5 5 4 c2 negative terminal of the inverting chargepump capacitor 6 6 5 v 5.5v output generated by the charge pump 7 7 6 t 1 out rs232 driver output. 15 17 14 t 2 out rs232 driver output. 8 8 7 r 1 in rs232 receiver input 14 16 13 r 2 in rs232 receiver input 9 9 8 r 1 out ttl/cmos receiver output 13 15 12 r 2 out ttl/cmos receiver output 10 10 9 t 1 in ttl/cmos driver input 12 13 11 t 2 in ttl/cmos driver input 11 12 10 gnd ground. 16 18 15 v cc +3.0v to +5.5v supply voltage 17 19 16 shdn shutdown control input. drive high for normal device operation.drive low to shutdown the drivers (highz output) and the on board power supply 18 20 n.c. no connect 11 , 14 pin function
6 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 figure 7. pinout con? guration for the sp3232eb figure 6. pinout con? gurations for the sp3222eb v- 1 2 3 4 17 18 19 20 5 6 7 16 15 14 shdn c1+ v+ c1- c2+ c2- n.c. en r1in gnd v cc t1out n.c. 8 9 10 11 12 13 r2in r2out sp3222eb t2out t1in t2in r1out ssop/tssop v- 1 2 3 4 15 16 17 18 5 6 7 14 13 12 shdn c1+ v+ c1- c2+ c2- en r1in gnd v cc t1out 8 9 10 11 r2in sp3222eb t2out t2in t1in r1out nsoic r2out v- 1 2 3 4 13 14 15 16 5 6 7 12 11 10 c1+ v+ c1- c2+ c2- r1in r2in gnd v cc t1out t2in 8 9 sp3232eb t1in r1out r2out t2out pinout
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 7 figure 8. sp3222eb typ ical operating circuits sp3222eb 2 4 6 5 3 7 19 gnd t1in t2in t1out t2out c1+c1- c2+c2- v+ v- v cc 13 12 0.1f 0.1 f 0.1f + c2 c5 c1 + + *c3 c4 ++ 0.1f 0.1f 8 17 rs-232outputs rs-232inputs logic inputs v cc 18 1 5k r1in r1out 15 9 5k r2in r2out 10 16 logic outputs en 20 shdn *can be returned to either v cc or gnd ssop tssop sp3222eb 2 4 6 5 3 7 17 gnd t1in t2in t1out t2out c1+c1- c2+c2- v+ v- v cc 12 11 0.1f 0.1f 0.1f + c2 c5 c1 + + *c3 c4 ++ 0.1f 0.1f 8 15 rs-232outputs rs-232inputs logic inputs v cc 16 1 5k r1in r1out 13 9 5k r2in r2out 10 14 logic outputs en 18 shdn *can be returned to either v cc or gnd nsoic figure 9. sp3232eb typ ical operating circuit sp3232eb 1 3 5 4 2 6 16 gnd t1in t2in t1out t2out c1+c1- c2+c2- v+ v- v cc 11 10 0.1f + c2 c5 c1 + + *c3 c4 ++ 14 7 rs-232outputs rs-232inputs logic inputs v cc 15 5k r1in r1out 12 13 5k r2in r2out 9 8 logic outputs *can be returned to either v cc or gnd 0.1f 0.1f 0.1f 0.1f typical operating circuits
8 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 the sp3222eb/sp3232eb tr ansceivers meet the eia/tia232 and itut v. 28/v.24 communication protocols and can be implemented in batterypowered, portable, or handheld applications such as notebook or palmtop computers. the sp3222eb/ sp3232eb de vices feature exar's pr opri etary onboard charge pump circuitry that generates 5.5v for rs232 voltage levels from a single +3.0v to +5.5v power supply . this series is ideal for +3.3v only systems, mixed +3.3v to +5.5v systems, or +5.0v only systems that require true rs232 performance. the sp3222eb/sp3232eb d e vices can operate at a data rate of 250kbps when fully loaded. the sp3222eb and sp 3232eb ar e 2 driver/2 receiver devices ideal for portable or handheld applications. the sp3222eb features a 1a s h utdown mode that reduces power consumption and extends battery life in portable systems. its receivers remain active in shutdown mode, allowing external devices such as modems to be monitored using only 1a supply current. theory of operation the sp3222eb/sp3232eb se ries is made up of three basic circuit blocks:1. drivers 2. receivers 3. the exar proprietary charge pump drivers the drivers are inverting level transmitters that convert ttl or cmos logic levels to + 5.0v eia/tia232 levels with an inverted sense relative to the input logic levels. typ ically, the rs232 output voltage swing is + 5.4v with no load and + 5v minimum fully loaded. the driver outputs are protected against in? ni te shortcircuits to ground with out degradation in reliability . driver outputs will meet eia/tia562 levels of +/3.7v with supply voltages as low as 2.7v. the drivers can guarantee a data rate of 250kbps fully loaded with 3k in parallel with 1000pf, ensuring compatability with pctopc communication software. the slew rate of the driver is internally limi ted to a maximum of 30v/s in order to meet the eia standards (eia rs 232d 2.1.7, para graph 5). the transition of the loaded output from high to low also meet the monotonic ity requirements of the standard.figure 10 shows a loopback test circuit used to test the rs232 drivers. figure 11 sh ows the test results of the loopback circuit with all drivers active at 120kbps with rs232 loads in parallel wi th a 1000pf capacitor . figure 12 shows the test results where one driver was active at 250kbps and all drivers loaded with an rs232 receiver in parallel with 1000pf capacitors. a so lid rs232 data transmis sion rate of 250kbps provides compatibility with many designs in personal computer peripherals and lan applications. the sp3222eb dr iver's output stages are turned off (tristate) when the device is in shutdown mode. when the power is off, the sp3222eb de vice permits the outputs to be driven up to +/12v . the driver's inputs do not have pullup resistors. designers should connect unused inputs to vcc or gnd. in the shutdown mode, the supply current falls to less than 1a, where shdn = low . when the sp3222eb de vice is shut down, the device's driver outputs are disabled (tristated) and the charge pumps are turned of f with v+ pulled down to vcc and v pulled to gnd. the time required to exit shutdown is typically 100s. connect shdn to vcc if the shutdown mode is not used. description
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 9 receiversthe receivers convert eia/tia232 levels to ttl or cm os logic output levels. the sp3222eb re ceivers have an inverting tristate output. these receiver outputs (rxout) are tristated when the enable control en = high. in the shutdown mode, the receivers can be active or inactive. en has no effect on txout . the truth table logic of the sp3222eb d r iver and receiver outputs can be found in ta b le 2. since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mv . this ensures that the receiver is virtually immune to noisy transmission lines. should an input be left unconnected, an internal 5k pulldown resistor to ground will commit the output of the receiver to a high state. ta b le 2. sp3222eb tru th t able logic for shutdown and enable control figure 10. sp3222eb/sp3232eb driver loopback te s t circuit charge pumpthe charge pump is an exarpatended design (u.s. 5,306,954) and uses a unique approach compared to older lessef? ci ent designs. the charge pump still requires four external capacitors, but uses a fourphase voltage shifting technique to attain sym metrical 5.5v power supplies. the internal power supply consists of a regulated dual charge pump that provides output voltages of +/5.5v regardless of the input voltage (vcc) over the +3.0v to +5.5v range. figure 12. loopback te s t results at 250kbps figure 11. loopback te s t results at 120kbps sp3222ebsp3232eb gnd txin txout c1+ c1- c2+ c2- v+ v- v cc 0.1f 0.1f 0.1f + c2 c5 c1 + + c3 c4 ++ 0.1f 0.1f logic inputs v cc 5k rxin rxout logic outputs en* *shdn 1000pf v cc * sp3222eb only shdn en txout rxout 0 0 tri state active 0 1 tri state tri state 1 0 active active 1 1 active tri state description
10 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 in most circumstances, d ecoupling the power supply can be achieved adequately using a 0.1f bypass capacitor at c5 (refer to ? g ures 8 and 9) in applications that are sensitive to powersupply noise, decouple vcc to ground with a capacitor of the same value as chargepump capacitor c1. physically connect bypass capcitors as close to the ic as possible. the charge pump operates in a discontinu ous mode using an internal oscillator . if the output voltages are less than a magnitude of 5.5v , the charge pump is enabled. if the output voltages exceed a magnitude of 5.5v , the charge pump is disabled. this oscillator controls the four phases of the voltage shifting. a description of each phase follows. phase 1 v ss ch arge storage during this phase of the clock cycle, the positive side of capacitors c 1 and c 2 ar e initially charged to v cc . c l + is th en switched to gnd and the charge in c 1 C is tr ansferred to c 2 C . since c 2 + is co n nected to v cc , the voltage potential across capacitor c 2 is now 2 times v cc . phase 2 v ss tr ansfer phase two of the clock connects the negative terminal of c 2 t o t h e v ss storage capacitor and the positive terminal of c 2 to gn d. this transfers a negative gener ated voltage to c 3 . this generated voltage is regulated to a minimum voltage of 5.5v . simultaneous with the transfer of the voltage to c 3 , the positive side of capacitor c 1 is switched to v cc an d the negative side is connected to gnd.phase 3 v dd ch arge storage the third phase of the clock is identical to the ? rs t phase the charge transferred in c 1 pr oduces Cv cc in the negative terminal of c 1 , which is applied to the negative side of capacitor c 2 . since c 2 + is at v cc , the voltage potential across c 2 is 2 times v cc . phase 4 v dd tr ansfer the fourth phase of the clock connects the negative terminal of c 2 to gn d, and transfers this positive generated voltage across c 2 to c 4 , the v dd st orage capacitor . this voltage is regulated to +5.5v. at this voltage, the in ternal oscillator is disabled. simultaneous with the transfer of the voltage to c 4 , the positive side of capacitor c 1 is sw itched to v cc an d the negative side is con nected to gnd, allowing the charge pump cycle to begin again. the charge pump cycle will continue as long as the operational conditions for the internal oscillator are present.since both v + an d v C ar e separately gener ated from v cc , in a noCload condition v + and v C wi ll be symmetrical. older charge pump approaches that generate v C fr om v + wi ll show a decrease in the magnitude of v C co mpared to v + du e to the inherent inef? ciencies in the design. the clock rate for the charge pump typically operates at greater than 250khz. the exter nal capacitors can be as low as 0.1f with a 16v breakdown voltage rating. description
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 11 figure 14. charge pump phase 2 v cc = + 5v v ss sto rag e capac itor v dd sto rag e cap acit or c 1 c 2 c 3 c 4 + + + + ? ? ? ? -5.5v v cc = +5v ?5v ?5v +5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + + + ? ? ? ? figure 13. charge pump phase 1figure 16. charge pump phase 3 v cc = +5v ?5v ?5v +5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + + + ? ? ? ? figure 17. charge pump phase 4 v cc = + 5v v ss sto rag e capac itor v dd sto rag e cap acit or c 1 c 2 c 3 c 4 + + + + ? ? ? ? +5.5v figure 15. charge pump waveforms ch1 2.00v ch2 2.00v m 1.00ms ch1 5.48v 2 1 t t [] t +6v a) c 2+ b) c 2 - gnd gnd -6v description
12 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 esd tolerance the sp3222eb/sp3232eb series incor porates ruggedized esd cells on all driver output and receiver input pins. the esd structure is improved over our previous family for more rugged applications and environments sensitive to electrostatic discharges and associated transients. the improved esd tolerance is at least +15kv without damage nor latchup. there are dif ferent methods of esd testing applied: a) milstd883, method 3015.7 b ) iec6100042 airdischarge c ) iec6100042 direct contact the human body model has been the generally accepted esd testing method for semiconductors. this method is also speci? ed in milstd883, method 3015.7 for esd testing. the premise of this esd test is to simulate the human body s potential to store electrostatic energy and discharge it to an integrated circuit. the simulation is performed by using a test model as shown in figure 18. this method will test the ic s capability to withstand an esd transient during normal handling such as in manu facturing areas where the ics tend to be handled frequently. the iec6100042, formerly iec8012, is generally used for testing esd on equipment and systems. for system manufacturers, they must guarantee a certain amount of esd protection since the system itself is exposed to the outside environment and human pres ence. the premise with iec6100042 is that the system is required to withstand an amount of static electricity when esd is ap plied to points and surfaces of the equipment that are accessible to personnel during normal usage. the transceiver ic receives most of the esd current when the esd source is applied to the connector pins. the test circuit for iec6100042 is shown on figure 19. there are two methods within iec6100042, the air discharge method and the contact discharge method. with the air discharge method, an esd voltage is applied to the equipment under test (eut) through air. this simulates an electrically charged person ready to connect a cable onto the rear of the system only to ? n d an unpleasant zap just before the person touches the back panel. the high energy potential on the person discharges through an arcing path to the rear pa nel of the system before he or she even touches the system. this energy , whether discharged directly or through air , is predominan tly a function of the discharge current rather than the discharge voltage. v ariables with an air discharge such as approach speed of the object carrying the esd potential to the system and humidity will tend to change the discharge current. for example, the rise time of the discharge current varies with the approach speed. the contact discharge method applies the esd current directly to the eut . this method was devised to reduce the unpredictability of the esd arc. the discharge current rise time is constant since the energy is directly transferred without the airgap arc. in situ ations such as hand held systems, the esd charge can be directly discharged to the figure 18. esd te s t circuit for human body model r c dev ice und er test dc power source c s r s sw1 sw2 description
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 13 device pin human body iec61000-4-2 tested model air discharge direct contact level driver outputs + 15kv + 15kv + 8kv 4 receiver inputs + 15kv + 15kv + 8kv 4 equipment from a person already holding the equipment. the current is transferred on to the keypad or the serial port of the equipment directly and then travels through the pcb and ? nally to the ic. the circuit models in figures 18 and 19 rep resent the typical esd testing circuit used for all three methods. the c s i s i n itially charged with the dc power supply when the ? rs t switch (sw1) is on. now that the capacitor is charged, the second switch (sw2) is on while sw1 switches off. the voltage stored in the capacitor is then applied through r s , the current limiting resistor , onto the device under test (dut). in esd tests, the sw2 switch is pulsed so that the device under test receives a duration of voltage. for the human body model, the current limiting resistor (r s ) and the source capacitor (c s ) are 1.5k an 100pf , respectively . for iec6100042, the current limiting resistor (r s ) and the source capacitor (c s ) are 330 an 150pf, respectively . figure 20. esd te s t waveform for iec6100042 figure 19. esd te s t circuit for iec6100042 ta b le 3. tra nsceiver esd to l erance levels r s and r v add up to 33 0 for ie c10 00-4-2. r c dev ice und er tes t dc power source c s r s sw1 sw2 r v contact-discharge model t = 0ns t = 30ns 0a 15a 30a i t the higher c s va lue and lower r s va lue in the iec6100042 model are more stringent than the human body model. the larger storage capacitor injects a higher voltage to the test point when sw2 is switched on. the lower current limiting resistor increases the current charge onto the test point. description
14 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 pac kage: 20 pin ssop
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 15 pac kage: 16 pin ssop
16 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 pac kage: 16 pin wsoic
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 17 pac kage: 18 pin wsoic
18 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 pac kage: 16 pin nsoic
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 19 pac kage: 16 pin tssop
20 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 pac kage: 20 pin tssop
exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 21 ordering information note: "/tr" is for tape and reel option. "l" is for lead free packaging part number te m p. range package sp3222ebcal 0c to +70c 20 pin ssop sp3222ebcal/tr 0c to +70c 20 pin ssop sp3222ebctl 0c to +70c 18 pin wsoic sp3222ebctl/tr 0c to +70c 18 pin wsoic sp3222ebcyl 0c to +70c 20 pin tssop sp3222ebcyl/tr 0c to +70c 20 pin tssop sp3222ebeal 40c to +85c 20 pin ssop sp3222ebeal/tr 40c to +85c 20 pin ssop sp3222ebetl 40c to +85c 18 pin wsoic sp3222ebetl/tr 40c to +85c 18 pin wsoic sp3222ebeyl 40c to +85c 20 pin tssop sp3222ebeyl/tr 40c to +85c 20 pin tssop part number te m p. range package sp3232ebcal 0c to +70c 16 pin ssop sp3232ebcal/tr 0c to +70c 16 pin ssop sp3232ebcnl 0c to +70c 16 pin nsoic sp3232ebcnl/tr 0c to +70c 16 pin nsoic sp3232ebctl 0c to +70c 16 pin wsoic sp3232ebctl/tr 0c to +70c 16 pin wsoic sp3232ebcyl 0c to +70c 16 pin tssop sp3232ebcyl/tr 0c to +70c 16 pin tssop sp3232ebeal 40c to +85c 16 pin ssop sp3232ebeal/tr 40c to +85c 16 pin ssop sp3232ebenl 40c to +85c 16 pin nsoic sp3232ebenl/tr 40c to +85c 16 pin nsoic sp3232ebetl 40c to +85c 16 pin wsoic sp3232ebetl/tr 40c to +85c 16 pin wsoic sp3232ebeyl 40c to +85c 16 pin tssop sp3232ebeyl/tr 40c to +85c 16 pin tssop
22 exar corporation 48720 kato road, fremont ca, 94538 ? 5106687017 ? www.exar.com sp3222eb/sp3232eb_103_081414 revision history notice exar corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reli ability. exar corporation assumes no representation that the circuits are free of patent infringement. charts and schedules contained herein are only for illustration purposes and may vary depending upon a user's speci? c application. while the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. exar corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to signi? cantly affect its safety or effectiveness. products are not authorized for use in such applications unless exar corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ; (b) the user assumes all such risks; (c) potential liability of exar corporation is adequately protected under the circumstances. copyright 2014 exar corporation datasheet august 2014 send your serial transceiver technical inquiry with technical details to: serialtechsupport@exar.com reproduction, in part or whole, without the prior written consent of exar corporation is prohibited. date revision description 11 /02/05 legacy sipex datasheet 09/09/09 1.0.0 convert to exar format, update ordering information and change revision to 1.0.0. 06/07/11 1.0.1 remove obsolete devices per pdn 11051001 and change esd rating to iec6100042. 03/14/13 1.0.2 correct type error to rx input voltage range and tx transi tion region slew rate condition. 8/14/14 1.0.3 add max junction temperature and package thermal infor mation.

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